Finite Impulse Response with FPGA

Some FPGA FIR resources : 

https://www.fpga4student.com/2016/11/image-processing-on-fpga-verilog.html

https://www.dspguide.com/ch6/3.htm

https://www.hackster.io/whitney-knitter/dsp-for-fpga-simple-fir-filter-in-verilog-91208d

https://github.com/samiyaalizaidi/FIR-Filter

On DSP more generally :

https://www.analog.com/en/resources/technical-books/scientist_engineers_guide.html

https://visionbook.mit.edu/

 

On the rpi camera :

https://picamera.readthedocs.io/en/release-1.13/api_camera.html

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Here’s the FIR filter output using samiya alizaidi’s code lightly modified (to take in only 2 bits and output 3 bits) :

Next step is to be able to turn it on and off with a button to see the effect better, and to have a potentiometer (or even a new board with a bunch of bots) to vary the taps live somehow.

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I want to convolute in place an image recorded in BRAM. This will be a combination of down sampling and convoluting in parallel.

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MIT class using the OV7670 camera and an iCE40 :

https://github.com/westonb/OV7670-Verilog

Another MIT class which has a microchip to initialize the camera !

https://fpga.mit.edu/6205/F22/documentation/camera_board

The camera’s datasheet :

https://web.mit.edu/6.111/www/f2016/tools/OV7670_2006.pdf

Sobel filter implementation :

https://www.cs.columbia.edu/~sedwards/classes/2022/4840-spring/reports/CameraControl-report.pdf

opening up the rpi camera and trying different lenses :